Clean nanothickness silicon has conductivity boost

Feb. 28, 2006
February 28, 2006, Madison, WI--When University of Wisconsin (UW)-Madison graduate student Pengpeng Zhang successfully imaged a piece of silicon only 10 nm in thickness, she and her research olleagues were puzzled. According to established thinking, the feat should be impossible because her microscopy method required samples that conduct electricity.

February 28, 2006, Madison, WI--When University of Wisconsin (UW)-Madison graduate student Pengpeng Zhang successfully imaged a piece of silicon only 10 nm in thickness, she and her research colleagues were puzzled. According to established thinking, the feat should be impossible because her microscopy method required samples that conduct electricity.

"After she did it, we realized, 'Hey, this silicon layer is really thin--it's much thinner than what people normally use,'" said UW-Madison physicist Mark Eriksson. "In fact, it's thin enough that it should be very hard to run a current through it. So we began asking, 'Why is this working?'"

A team led by UW College of Engineering professors Paul Evans, Irena Knezevic, and Max Lagally and physics professor Eriksson has now answered that question. They have shown that when the surface of nanoscale silicon is specially cleaned, the surface itself facilitates current flow in thin layers that ordinarily won't conduct. In fact, conductivity at the nanoscale is completely independent of the added impurities, or dopants, that usually control silicon's electrical properties, the team reports.1

"What this tells us is that if you're building nanostructures, the surface is really important," said Evans. "If you make silicon half as thick, you would expect it to conduct half as well. But it turns out that silicon conducts much worse than that if the surface is poorly prepared and much better than that if the surface is well prepared."

The results also mean that the concepts, methods, and instruments created for silicon electronics and honed by scientists and the semiconductor industry over decades--many of which require conductive samples, like the scanning-tunneling-microscopy method employed by Zhang--can also be used to explore the nanoworld.

"We're working at the crossover between silicon electronics and nanoelectronics," said Evans. "This material is the same size as nanodevices like silicon nanowires and quantum dots. But now we can use the tools from silicon electronics we already have to probe it."

The team studied silicon-on-insulator substrates, in which a half-millimeter-thick silicon wafer is covered by a much thinner layer of insulating silicon oxide. Another silicon layer, in turn, tops the oxide layer. In the UW-Madison investigation, this uppermost layer was a 10-nm-thick nanomembrane. Silicon nanomembranes could one day become the platform for future high-speed electronics and a host of novel sensor technologies, said Lagally. But like all silicon, they naturally develop another unwanted layer of oxide on top when exposed to air, resulting in an oxide-silicon-oxide structure. And the usual means to drive off the top oxide--by heating the material to more than 1200 degrees Celsius--causes nanomembranes to ball up.

What Zhang originally developed was a method to remove the top oxide without causing this damage. Under ultra-high vacuum, she slowly deposited several additional silicon or germanium layers, each just one atom thick, at 700 degrees C.

Scanning-tunneling microscopy soon revealed that this process somehow allowed the nanomembrane to conduct electricity. To find out why, the team analyzed the resistance-the inverse of conductivity-of silicon layers ranging from to 200 to 15 nm in thickness. More importantly, they compared silicon's resistance when sandwiched between two oxide layers-the usual case-and when cleaned of the top oxide and exposed to vacuum through Zhang's method. Knezevic then created a model predicting resistance as a function of layer thickness in both situations.

Knezevic's model indicates that in layers thinner than 100 nm, the properties of silicon itself become irrelevant: what matters is the surface. Even in relatively thick layers of 200 nm, silicon cleaned of the top oxide was at least 10 times more conductive than silicon sandwiched between oxide layers. And as layer thickness shrunk, this difference eventually grew to six orders of magnitude.

The team has proposed that cleaning promotes conductivity by creating new electronic states on the silicon surface where electrons can reside. States are to electrons what parking spaces are to cars. In silicon sandwiched between oxide layers, every parking space-indeed, the entire space of the lot-is jammed. With no empty spaces to move into, electrons are trapped in position and current can't flow.

When new states open up on the surface due to cleaning, a small number of electrons jump to the new spots. What they leave behind in the bulk silicon are holes--empty spaces that other electrons can fill. As electrons move into these holes, additional holes are produced. In this way, current begins to flow--all because of the surface.

"It's an interesting interplay," said Eriksson. "You clean the surface so you can image it. But then the surface ends up enabling conductivity in the entire silicon layer."

UW-Madison College of Engineering scientist Donald Savage; graduate students Emma Tevaarwerk and Byoung-Nam Park; and George Celler of Soitec USA also contributed to this work. The research was supported by the National Science Foundation, the U.S. Department of Energy and the U.S. Air Force Office of Scientific Research.

1. Pegpeng Zhang et al., Nature, Vol. 439, 9 Feb. 2006.

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