Optical interconnects improve computers

MAUI, HI?The Third International Conference on Massively Parallel Processing using Optical Interconnections (MPPOI), held late last year, highlighted progress in the performance, functionality, and cost of optical-interconnect-based computer systems as innovative designs and devices are introduced. The conference featured a pair of panel discussions, topics of which included intrasystem optical interconnects and the roles of university and industry in developing optical interconnect systems.

Optical interconnects improve computers

MAUI, HI?The Third International Conference on Massively Parallel Processing using Optical Interconnections (MPPOI), held late last year, highlighted progress in the performance, functionality, and cost of optical-interconnect-based computer systems as innovative designs and devices are introduced. The conference featured a pair of panel discussions, topics of which included intrasystem optical interconnects and the roles of university and industry in developing optical interconnect systems.

Commented John Goodman of the MPPOI steering committee, OThe quality of the papers was so high that there was no time to enjoy quality time on the beach.O Technical presentations focused on innovative ways to create highly efficient computer architectures using optical interconnects; examples include new designs of free-space optical connects, a parallel photonic fast-Fourier-transform processor, and systems incorporating smart-pixel technology and wavelength-division multiplexing (WDM).

Architectures of the future

In his presentation, Mark Snir of IBM T. J. Watson Research Center (Yorktown Heights, NY) predicted that future large systems will be built hierarchically with clusters of symmetric multiprocessors. The goal is to offer supercomputer performance at a cost/performance ratio close to that of technical workstations. Snir recommended OcommodityO hardware and software as tools to reach this goal; however, he also pointed out that tighter coupling in parallel applications could lead to nonscalable performance, cost increases, or weakened fault tolerances.

As single-board (or single-chip) microprocessors become available in the future, uniprocessor nodes will be replaced with shared-memory multiprocessor nodes. It will become necessary to attach the switch directly to the memory system, rather than to an I/O bus to scale switch bandwidth linearly to the node performance.

Improvements in technology don?t always lead to immediate performance enhancements, noted Goodman in his invited lecture. Current architectures are so well balanced that improvement in one parameter will quickly lead to a bottleneck elsewhere; for example, an improvement in bandwidth of one or two orders of magnitude will not dramatically improve performance of current computer designs. Instead, new designs will be needed that can take advantage of the vastly increased bandwidth.

Professor Paul Lukowicz, from the University of Karlsruhe (Karlsruhe, Germany) proposed a design that exploits the broadcast potential of optical buses to scale uniform memory access (UMA) shared-memory architectures to many more processors than are possible with current designs.

Component-level advances

The MPPOI conference underscored the increasing university and industry collaborations in this field. Scientists at Lucent Technologies (Murray Hill, NJ) and University of North Carolina at Charlotte (Charlotte, NC) have developed the asynchronous multiprocessor optoelectronic bit-sliced array (AMOEBA) chip, an optoelectronic switch for dense-WDM-based multiprocessor networking. The single-chi¥AMOEBA crossbar switch, relying on optoelectronic-VLSI integration, free-space optical interconnects, and wavelength- and space-division-multiplexed networking on a single-mode fiber, provides switched interconnection between multiple processors in a distributed-computing environment.

Scientists at NEC Corp. (Tokyo, Japan) presented a novel interconnection network based on a splitter-combiner space division optical switch incorporating semiconductor optical-amplifier gate switches for shared memory multiprocessors. Their experiment confirmed the feasibility of a 10-Gbit/s, 16 16 interconnection network at a latency of less than 100 ns, demonstrating that optical switches can simultaneously achieve bandwidth, scalability, and latency levels that cannot be matched by electronic switches.

Parallel optical interconnections

NTT Optoelectronics Laboratories (Kanagawa, Japan) scientists described parallel optical interconnections based on vertical-cavity surface-emitting lasers (VCSELs) and smart-pixel arrays; these devices are key to constructing parallel optical fiber links and free-space optical interconnects. VCSELs and smart pixels can simultaneously emit, switch, and process a large number of broadband optical signals, while maintaining the advantage of low power consumption.

Engineers from Motorola (Tempe, AZ) discussed the OPTOBUS I, an optical link with a 10-bit-wide bidirectional data interconnect, providing point-to-point transfer of parallel data at rates of u¥to 4 Gbit/s. The OPTOBUS I is one of the first products using VCSEL-based optical-interconnection technology. A prototype of the OPTOBUS II, which doubles the transfer rate of the current product, is under development.

Kazuko Andersen

KAZUKO ANDERSEN is a senior public relations representative at NEC USA Inc., New York, NY.

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