OPTICAL INTERCONNECTS: Light pipes seen as path to gigascale integration

An estimated 800 scientists, engineers, and other professionals will meet next month for the ninth annual IEEE International Interconnect Technology Conference (IITC; June 5-7, San Francisco, CA), focused on enabling the interconnects in semiconductor circuitry keep up with the pace of Moore’s Law.

May 1st, 2006
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An estimated 800 scientists, engineers, and other professionals will meet next month for the ninth annual IEEE International Interconnect Technology Conference (IITC; June 5-7, San Francisco, CA), focused on enabling the interconnects in semiconductor circuitry keep up with the pace of Moore’s Law. One of the more visionary ideas they will encounter involves replacing current electrical interconnects between chips and circuit boards with similarly sized “light pipes” that will carry both electronic and optical signals.

Semiconductor chips with 90 nm feature sizes are currently in volume production with 65 nm chips already in early production. Feature sizes of 45 nm technology are expected to be in production in two or three years with 32 nm projected for the beginning of the next decade.

While transistor speed has traditionally been considered the limiting factor for chip performance, the speed at which information can travel along interconnects looms as the new major limiting factor. The electrical resistance of metal lines increases as they are made thinner, and capacitive coupling arises among adjacent lines when they are spaced closely together, further inhibiting the passage of signals.

“I think it’s fair to say the interconnect issue is one of the most difficult challenges in the entire field of engineering,” said Stephen Luce, IITC 2006 publicity chairman and IBM distinguished engineer and chief technical executive for the company’s Essex Junction, VT, wafer fab.


Polymer light pipes (seen here in a schematic and a scanning-electron micrograph) could enable high-speed, high-bandwidth, low-loss communications between chip and board to meet future demands of gigascale integration in semiconductor manufacturing.
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Nevertheless, one does not have to look far along the exponential growth curve to the point where billions, rather than millions of transistors will be packed onto a chip, with concomitant stresses on speed and bandwidth. The International Technology Roadmap for Semiconductors projects that chipboard speed will approach 56 GHz when feature sizes shrink to 18 nm, which implies that new interconnect technologies will be required, according to Oluwafemi Ogunsola, a graduate research assistant and doctoral student at Georgia Tech (Atlanta, GA). Ogunsola and colleagues will present encouraging initial results for an optical approach to out-of-plane interconnection method between chip and board, at next month’s meeting. Unlike most such designs, however, the Georgia Tech method does not depend on a quasi-free-space transmission1.

The effectiveness of free-space solutions is limited in part by shifting alignment between chip and board due to differing coefficients of thermal expansion. So Ogunsola and colleagues propose using optical waveguides (light pipes) instead, made of a polymer that can flex to accommodate thermally induced alignment shifts. Since optical waveguides can carry higher bandwidths than electrical wires of the same size, the researchers also suggest using the light pipes to replace electrical interconnect pins (see figure). Metal coating on the exterior of the light pipes would conduct electricity along the periphery, while fiber in the core would guide optical signals.

Down, over, and up

So far they have demonstrated coupling through the light pipes to send signals from the board up into the pillar and vice versa, and they’ve also demonstrated optical coupling in a “U” shape, down one pillar, horizontally along the board, and up through another pillar. The key factor in doing this, Ogunsola said, was to come up with a repeatable method for precise fabrication of the angled mirrors needed to bend the optical signals 90° to couple from board to pillar and vice versa.

While 45° mirrors would be the intuitive choice for such a task for multimode fiber (a grating coupler would be required for single-mode), attempting to precisely fabricate such mirrors using existing processes would leave a degree of surface roughness that would render them unusable. Therefore, the Georgia Tech researchers chose to etch (100)-oriented silicon so as to reveal the (111) plane instead, which is naturally angled at 54.47°, Ogunsola said. Once the etched surface was metalized to make it reflective, the researchers found that 90° bending of light was still achieved due to confinement of the reflected light within the shaft of the waveguide, which demonstrates useful tolerance for mirror manufacturing. The next step in the research is to quantify the coupling efficiency, which is expected to be on the order of 80%.

Hassaun A. Jones-Bey

REFERENCE

1. O. O. Ogunsola et al., 2006 IEEE Int’l. Interconnect Tech. Conf. (IITC), June 2006.

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