Quantum computing moves from physics problem to manufacturing problem

Building qubits is one thing, making them at scale is another thing entirely.

For years, the quantum computing race was told as a physics story: More qubits, higher fidelity, and so on. This framing was clear enough, but the real contest has now moved to the fab. The question is whether we can make thousands of qubits over and over again, with the same result, on a wafer or by other means, using a supply chain we actually control.

This is, in many ways, a normal manufacturing story for a young technology, with a front-end, packaging, assembly and test, and it sits at the heart of Yole Group's knowledge, which will be detailed in the coming report, Quantum Technologies 2026.

Every qubit has its own recipe

Quantum is not like a standard complementary metal-oxide semiconductor (CMOS), and there is no single quantum process flow. Each way of building a qubit comes with its own machine, its own control chain, and its own headaches (see figure). Every modality has its own challenges.

Superconducting qubits live or die by the Josephson junction, a tunnel barrier only a few atoms thick. It has long been made by double-angle shadow evaporation and lift-off, which is really more of a laboratory trick than a fab process. Junction uniformity sets how repeatable the qubit frequency is, and a spread of just a few percent can ruin a multi-qubit processor. In addition, two-level-system defects within the oxides and at the interfaces slowly drain coherence. Getting the process right here means ultraclean superconducting metals, meticulous attention to oxidation, and lift-off-free junction methods that can be replicated by industrial tools.

Silicon spin qubits are the closest cousins to CMOS and already run on 300-mm lines at imec, CEA-Leti, and Intel. But close is not the same as CMOS. They need silicon enriched in the silicon-28 isotope, and a uniformity well beyond that of a normal transistor. Quobly is one company working within this field, with STMicroelectronics at Crolles, and with SOITEC supplying the wafers, while Equal1 in Ireland works with TNO on silicon germanium (SiGe) qubits.

Photonic qubits make the most direct use of a maturing silicon photonics base, with PsiQuantum and Xanadu, for example, building on GlobalFoundries’ 300-mm line. Even so, the standard process kit is not enough. These chips call for very-low-loss waveguides, new switch materials such as barium titanate, and superconducting single-photon detectors that no normal photonics flow includes. Barium titanate itself needs its own set of tools that have still to be developed.

Trapped-ion chips and neutral-atom (cold atom) platforms scale by incorporating photonics and highly specialized packaging. For both, assembling and aligning the optical parts is extremely challenging.

Nitrogen vacancy (NV) center qubits are built in diamond, using NV centers read out with light rather than cooled to a fraction of a degree. The setup pairs a diamond chip with a green 532-nm laser and an avalanche photodiode (APD) or charge-coupled device (CCD) photon detector, with microwaves for control (see figure). The manufacturing challenge sits within the diamond itself: Growing very pure material and placing the vacancy centers exactly where they are needed, at a repeatable depth, so that many of them behave identically. This is more of a materials and placement problem than a lithographic one, and it does not map onto any standard fab line.

Topological qubits are the most demanding of all, since they are meant to exist in an exotic state of matter rather than in a simple circuit. They still lean on the same cold hardware as superconducting qubits, with a dilution refrigerator, a cryogenic pump and compressor, and radio-frequency (RF) plus direct current (DC) gates, but here the readout is done by charge sensing with quantum dots—in effect a parity measurement (see figure). The making of these chips depends on growing very clean hybrid semiconductor-superconductor materials with almost no defects, which is why this option is still the least mature—even though it promises qubits that are far more stable by design.

Where quantum breaks the chipmaking rulebook

There are at least three fundamental differences. The first is materials: Superconductors, exotic oxides, and indium are often unwelcome guests in a CMOS fab, where they are regarded as contaminants.

The second is metrology: A chip can pass every room-temperature check and still fail at 20 millikelvins, because the defects that really matter are invisible to in-line inspection.

The third is economics: Quantum volumes are counted in wafers per month, not per day. Lithography is rarely the sticking point. What bites instead are the interfaces, the losses, the very low yield, the throughput, and the need to get the same result every time.

Short list of fabs that can actually help

Academic cleanrooms are excellent and very flexible, but they were never built for volume. Pilot lines run by research organizations such as imec, CEA-Leti, VTT, and Fraunhofer for superconducting work close part of the gap. On the commercial side, the list of foundries willing to run superconducting metals or any other exotic material at low volume and with quantum-grade process control is remarkably short. This is exactly why GlobalFoundries’ new Quantum Technology Solutions unit and SkyWater’s move into quantum foundry work are so important. Choosing a secure foundry is now every bit as strategic as choosing a qubit modality.

The deal that showed where the fight really is

The clearest sign that making the chips is the new high ground came when IonQ announced a $1.8B deal to buy SkyWater Technology, taking a trusted U.S. foundry with advanced packaging in-house to become a fully integrated quantum platform company. So what’s the best route? Buy the fab, as with IonQ and SkyWater? Build a deep partnership, as PsiQuantum has with GlobalFoundries, and as Oxford Ionics has with Infineon at Villach? Or build your own fab, as Rigetti and IQM are doing?

Every serious player has to answer the same question: Who controls my qubit supply chain? Add the demand from government customers to keep things sovereign, and owning your own manufacturing becomes a real competitive moat.

The quiet part decides the winners

Connecting the qubits, assembling the quantum processing units (QPUs), wiring in the control chips is all packaging work, a field Yole Group has followed for more than a decade. Superconducting QPUs need flip-chip packaging with superconducting indium bumps, through-silicon vias, and multichip stacks. The thousands of microwave lines running into a dilution refrigerator call for cryogenic flex cabling and, in time, cryo-CMOS control right next to the qubits. Trapped-ion packages must maintain submicron optical alignment through the heat of an ultrahigh-vacuum bake. And packaging everything into a final form factor small enough that the machine does not end up the size of a New York City block will also help decide who will lead in quantum manufacturing.

The problem nobody likes to talk about

This is probably the most underrated challenge—and one the industry still prefers not to dwell on. Coherence and fidelity only show up at cryogenic temperatures, and a single cooldown can take days. Answers are starting to appear: Room-temperature stand-ins such as junction resistance mapping, cryogenic wafer probers like Bluefors with Afore testing 300-mm wafers down to 1 K, and FormFactor’s 4-K systems that cool in hours rather than days, along with measurement stacks from Zurich Instruments, Quantum Machines, Qblox, and Keysight. But a true quantum test industry, the equivalent of the automated test equipment (ATE) world in chips, does not exist yet. It will need to.

No ASML of quantum, yet

A specialized equipment base is taking shape all the same: Plassys-Bestek for ultrahigh-vacuum deposition of Josephson junctions, Oxford Instruments for plasma processes and cryogenics, Bluefors for dilution refrigerators, FormFactor and Afore for cryogenic probing, and Delft Circuits for cryogenic input and output. These are fine technologies, but the companies behind them are not yet to quantum what Applied Materials and ASML are to CMOS.

Beyond the qubit-count headlines

Qubit counts will continue to grab the headlines. But the winners will be the ones who also master oxidation chambers, indium bumps, and cryogenic probe cards, and who lock in the fabs to run them all.

In September 2026, Yole Group will release its new quantum report, Quantum Technologies 2026. With quantum now firmly in an engineering phase, the report looks at the challenges in front-end processes, the foundry and packaging landscape, supply chain strategies, testing, and the equipment ecosystem.

For almost three decades, Yole Group has investigated emerging technologies where it counts most, at the meeting point of markets and manufacturing. Its analysts have stood at this kind of turning point before, in MEMS, in photonics and in advanced packaging. Now it is quantum's turn.

About the Author

Eric Mounier

Eric Mounier

Eric Mounier is chief analyst, Photonics, at Yole Group. With more than 30 years’ experience in the semiconductor industry, Mounier provides daily in-depth insight into emerging semiconductor technologies, including quantum, terahertz, photonics, and sensing. He works closely with all Yole Group’s teams to highlight disruptive technologies and to weigh business opportunities through technology and market reports and custom consulting. Mounier has spoken at many international conferences and previously held R&D and marketing roles at CEA-Leti in France. He holds a Ph.D. in semiconductor engineering and a degree in optoelectronics from the National Polytechnic Institute of Grenoble.

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