The first conference will be held April 20 to 22 in Brussels, Belgium, featuring
more than 40 expert presentations that showcase how advanced packaging isenabling semiconductor innovation.

BRUSSELS, BELGIUM (MARCH 10, 2026) – At the first Advanced Packaging International Conference, NHanced Semiconductors president Robert Patti will present a talk entitled“Foundry 2.0: A New Foundation For Semiconductors & Innovation” on April 21st as part of a series of expert talks at the event. 

The AP Int’l program includes industry leaders and academic experts delivering technical presentations, panel discussions, a poster session, and numerous networking opportunities, providing comprehensive insights into how advanced packaging is enabling system-level semiconductor innovation.

“In the 1960s, Gordon Moore predicted a ‘day of reckoning’ for semiconductor scaling, and that day has arrived,” said Patti. “Advanced packaging provides a new path for semiconductor innovation that doesn’t rely on traditional scaling. At the core of this path is a new business model: ‘Foundry 2.0.’”

A preview of Patti’s presentation follows:

Paradigm shift in semiconductor manufacturing

For the past 50 years, the traditional semiconductor manufacturing business model – Foundry 1.0 – has focused on scaling smaller transistors on more densely-packed chips. However, each smaller node has faced higher development costs, higher capital costs, longer development times, expensive design tools, and high risk. The response to this situation has been a paradigm shift in this manufacturing model as the industry looks to advanced packaging to deliver better cost, performance, and SWaP parameters.

Foundry 2.0 represents a fundamental change for the industry

Foundry 2.0 brings together the best of advanced packaging technologies and material solutions by using the same interconnect and manufacturing methods typically used in building semiconductor devices themselves. The next generation of semiconductors will be developed through advanced packaging, additive silicon manufacturing, and true heterogeneous integration to achieve better ROI, lower development costs, and reduced capital expenditures.