Pixel-level analog-to-digital conversion results in 40 times less power

Compared to the most power-efficient designs being proposed, scientists at the University of Rochester (Rochester, NY) have developed a CMOS image sensor with pixel-level analog-to-digital conversion capability that shows a 40-fold reduction in power dissipation when operating from a 3.3-V power supply. The design consumes only 0.88 nW per pixel, has 16 bits of intra-scene dynamic range comparable to high-grade CCD imagers, and attenuates fixed-pattern noise to zero.

In the design, each pixel of the sensor is provided with a separate analog-to-digital converter. A photodiode that integrates photon-induced charge is used as the integrator, and the quantizer is multiplexed to a selected pixel through a transistor, allowing use of a low-power dynamic comparator without preamplification. The rows of the imager are sequentially selected so that the body of the quantizer is multiplexed to a single pixel at a time. The very low power consumption could bring cell-phone video calls closer to reality and further shrink the size of video cameras. Contact Mark F. Bocko at [email protected].