IMEC reports promising method to fabricate ultra-thin silicon solar cells

July 14, 2008--New lift-off process produces silicon wafers 30 to 50 microns thin, say IMEC researchers. Reducing the amount of silicon is a promising way to reduce the cost of solar-cell wafers.

July 14, 2008--The nanotechnology research center IMEC (Leuven, Belgium) announced at the Semicon West 2008 conference in San Francisco that it is developing a new method to produce 50 µm thin crystalline silicon (Si) wafers for use in solar cells. The process involves mechanically initiating and propagating a crack parallel to the surface of a Si wafer. The method makes use of industrially available tools and is potentially kerf-loss free.

Adding an ultra-thin wafer or foil of active silicon on top of a low-cost substrate is a promising solution to reduce the amount of high-grade silicon used in solar cells. IMEC is pursuing different paths to produce such foils of crystalline Si at an acceptable cost. The method announced at Semicon West is a lift-off process that only requires the use of a screen printer and a belt furnace; no ion-implanted or porous layer is needed.

In the lift-off process, a metallic layer is screenprinted on top of a thick crystalline Si wafer, which is then annealed in a belt furnace at a high temperature. When the wafer cools, the mismatch of the thermal expansion coefficient between the metal and the silicon induces a stress field in the substrate. The stress field grows, initiating and propagating a crack in the silicon, close to and parallel with the surface. Next, the top layer of the silicon and the attached metal layer snap off from the parent substrate. The metal layer is removed from the silicon foil in a metal-etching solution, resulting in a clean and stress-free ultra-thin silicon foil. The substrate can be re-used to peel off further layers.

The process was demonstrated on both single- and multi-crystalline silicon, as well as on different orientations of material generated via the Czochralski (Cz; a method of crystal growth used to obtain single crystals of semiconductors) process. IMEC has produced Si foils with an area of 25 cm2 and a thickness of 30 to 50 µm.

One of the resulting thin Cz foils was further processed into a solar cell using a heterojunction emitter process. The 1 cm2 cell reached an efficiency of 10.0%, without back-surface passivation or intentional surface texturing. These preliminary results indicate that the quality of the material is largely preserved during the lift-off process, in spite of the large stresses involved. IMEC expects to reach much higher efficiencies with added surface passivation and texturing.

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