MINIATURE CAMERAS: Through-silicon vias make microcameras even smaller

Building on earlier work that described breakthrough wafer-level-packaging developments related to miniature complementary metal-oxide semiconductor (CMOS) imagers with 1.7 µm pixel pitch, researchers at the Fraunhofer Institute for Reliability and Microintegration (Fraunhofer IZM; Berlin, Germany) and Awaiba GmbH (Nürnberg, Germany) now report a tiny CMOS camera for endoscopic applications.1 The camera is fabricated using through-silicon vias to enable complete wafer-scale integration of both the sensor and the imaging optics.2 The result is a low-cost, super-small CMOS camera only one cubic millimeter in size that makes disposable endoscopes feasible.

Wafer-level packaging

Through-silicon-via (TSV) technology has been instrumental in enabling true wafer-level packaging for image sensors. Before TSV technology, image-sensor electrical contacts were wire bonded, increasing the size of the cameras, because the optical assembly had to house the sensor as well as the lateral protruding wire bonds. Flip-chip processing for front-side imagers was not possible because bonding the sensor to an opaque substrate would block incident light from the sensor. But with TSVs, electrical contacts are moved to the backside of the device, keeping the active side of the sensor free. The objective of the camera (lenses, apertures, and filters) can be placed directly on the sensor chip, saving space and creating a true wafer-level camera in contrast to other single-optic-to-wafer assembly techniques

The packaging process begins with the CMOS sensor, which is first bonded using UV-curable adhesive (on its active side) to a glass substrate. The CMOS wafer is then thinned to a thickness of 40 µm. The glass substrate not only protects the sensor but is carried along throughout the process and must be considered in the final optical design of the camera. In the backside of the thinned sensor wafer the TSVs are then plasma etched. The etching of tapered TSVs simplifies the deposition of a polymer inter-dielectric layer, which can also be applied by spin coating. A subsequent plasma-etch step clears the oxide above the aluminum pads of the sensors for electrical connections. The metallization of the redistribution is completed by standard copper plating with a thickness of 5 µm. A second polymer layer that serves as passivation and the bump formation completes the sensor portion of the process. The bumps are formed using gold plating with a height of 35 µm, but other typical bump metallurgies and sizes are possible.

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Through-silicon-via (TSV) technology enables low-cost CMOS cameras smaller than a match head. (Courtesy of Awaiba GmbH)

With the electric contacts now relegated to the backside of the imaging sensor, the “imaging” or wafer-level optics portion of the microcamera can be completed. Depending on the requirements of the optic design, several techniques for lens manufacturing are possible. Both aspheric microlens arrays can be replicated in polymer from a primary diamond-milled mold, and spherical lenses can also be etched in glass if the sag heights are not too big. Apertures are realized by a structured chromium layer. The lenses and apertures are fabricated separately and adhesive-bonded to the wafer. During integration, around 25,000 of the microcameras (with 62,500 pixels each) are finished in one process step—impressive considering that the best endoscopes using optical-fiber bundles offer only 3000 imaging pixels (see figure).

“Our integration technology is very promising for camera devices, where size is the highest priority,” says Martin Wilke, scientist at Fraunhofer IZM who led the project. “We are not able at the moment to scale up the technology for megapixel cell phones since with increasing pixel count the wafer-level optics integration becomes very complicated. But we definitively see a market in the medical sector and also interesting applications in the automotive industry and machine-vision sector.” —Gail Overton

REFERENCES

1. M. Wilke et al., Proc. 7th Intl. Wafer Level Packaging Conf. 2010, Santa Clara, CA, 96–102 (October 2010).
2. M. Wilke et al., “Prospects and Limits in Wafer-Level-Packaging of Image Sensors,” presented at ECTC 2011 – Electronic Components and Technology Conference, Lake Buena Vista, FL (May 2011).

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